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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Unaligned read followed by bswap generates suboptimal code"
href="https://bugs.llvm.org/show_bug.cgi?id=48970">48970</a>
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<th>Summary</th>
<td>Unaligned read followed by bswap generates suboptimal code
</td>
</tr>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>11.0
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: RISC-V
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>eduardosanchezmunoz@gmail.com
</td>
</tr>
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<th>CC</th>
<td>asb@lowrisc.org, llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>On RISC-V, an unaligned read followed by a bswap produces suboptimal code.
Given the following IR:
declare i16 @llvm.bswap.i16(i16)
define i16 @read(i16* %p) {
start:
%v = load i16, i16* %p, align 1
ret i16 %v
}
define i16 @read_swap(i16* %p) {
start:
%v = load i16, i16* %p, align 1
%v2 = tail call i16 @llvm.bswap.i16(i16 %v)
ret i16 %v2
}
compiled with llc -mtriple=riscv64-unknown-linux-gnu -O3
it produces the following assembly:
read:
lb a1, 1(a0)
lbu a0, 0(a0)
slli a1, a1, 8
or a0, a0, a1
ret
read_swap:
lb a1, 1(a0)
lbu a0, 0(a0)
slli a1, a1, 8
or a0, a0, a1
slli a1, a0, 40
addi a2, zero, 255
slli a2, a2, 48
and a1, a1, a2
slli a0, a0, 56
or a0, a0, a1
srli a0, a0, 48
ret
The code for read is generated as expected. However, the code for read_swap can
be simplified to:
read_swap:
lb a1, 0(a0)
lbu a0, 1(a0)
slli a1, a1, 8
or a0, a0, a1
ret</pre>
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