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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [AMDGPU][MC] Incorrect handling of carry in/out operands in VOP3"
   href="https://bugs.llvm.org/show_bug.cgi?id=48711">48711</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[AMDGPU][MC] Incorrect handling of carry in/out operands in VOP3
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AMDGPU
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>dpreobrazhensky@luxoft.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Assembler expects that carry-in and carry-out operands are registers. However
when a constant is specified, it breaks assembler. 

Assembler should be corrected to detect these cases and issue a meaningful
error message.

Examples of failed tests:

    // VI
    v_addc_u32 v1, -1, v2, v3, vcc
    v_addc_u32 v1, vcc, v2, v3, 0

    // GFX10, ws=32
    v_add_co_ci_u32_e64 v5, 0, v1, v2, s1
    v_add_co_ci_u32_e64 v5, s0, v1, v2, 1</pre>
        </div>
      </p>


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