<html>
<head>
<base href="https://bugs.llvm.org/">
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [arm] Use lsl/lsr for masking when immediate and is impossible"
href="https://bugs.llvm.org/show_bug.cgi?id=48565">48565</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[arm] Use lsl/lsr for masking when immediate and is impossible
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>10.0
</td>
</tr>
<tr>
<th>Hardware</th>
<td>Other
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: ARM
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>husseydevin@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org, smithp352@googlemail.com, Ties.Stuij@arm.com
</td>
</tr></table>
<p>
<div>
<pre>Missed ARM optimization.
unsigned test(unsigned x)
{
return x & 0x1ff;
}
clang --target=arm-none-eabi -march=armv4t -Oz -S test.c
test:
mov r1, #0xff
orr r1, r1, #0x100
and r0, r0, r15
bx lr
clang --target=arm-none-eabi -march=armv4t -Oz -S test.c -mthumb
test:
ldr r1, .LCPI1_0
ands r0, r1
bx lr
.p2align 2, 0
.LCPI1_0:
.word 0x1ff
If you can't do AND (immediate), if possible, lsl+lsr should be used to avoid
manual masking (similar to sign extension on pre-ARMv6).
This is especially useful on Thumb-1 where AND (immediate) is unavailable and
generating constants wastes Lo registers (and often needs a constant pool).
test:
lsl(s) r0, r0, #23
lsr(s) r0, r0, #23
bx lr</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>