<html>
    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - miscompiling sub without nsw"
   href="https://bugs.llvm.org/show_bug.cgi?id=47830">47830</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>miscompiling sub without nsw
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>11.0
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>Other
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: PowerPC
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>programmerjake@gmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org, nemanja.i.ibm@gmail.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>From <a href="https://github.com/rust-lang/rust/issues/72023#issuecomment-707901014">https://github.com/rust-lang/rust/issues/72023#issuecomment-707901014</a>

I didn't actually run it on a Power processor to test, but AFAICT the bug
reduces to this:
```rust
pub fn f(a: i64, b: i64) -> u64 {
    if a < b {
        0
    } else {
        a.wrapping_sub(b) as u64
    }
}
```

generated IR:
<a href="https://rust.godbolt.org/z/GYT7oG">https://rust.godbolt.org/z/GYT7oG</a>

target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"

define i64 @_ZN7example1f17h0a621b2f201f6c8fE(i64 %a, i64 %b) unnamed_addr #0
!dbg !6 {
  %_3 = icmp slt i64 %a, %b, !dbg !10
  %0 = sub i64 %a, %b
  %spec.select = select i1 %_3, i64 0, i64 %0, !dbg !11
  ret i64 %spec.select, !dbg !12
}

attributes #0 = { norecurse nounwind nonlazybind readnone uwtable
"target-cpu"="ppc64le" }
<snip>

LLVM miscompiles it assuming that `a.wrapping_sub(b)` won't have signed
overflow.

<a href="https://rust.godbolt.org/z/49fncx">https://rust.godbolt.org/z/49fncx</a>

Output assembly:
```
example::f:
        sub.    3, 3, 4
        isellt  3, 0, 3
        blr
        .long   0
        .quad   0
```

the `sub.` sets the condition register `CR0` based on sign of wrapped result,
not on if `r3` is less than, equal to, or greater than `r4`.</pre>
        </div>
      </p>


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