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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Opportunity to improve codegen for i > l && l < h"
href="https://bugs.llvm.org/show_bug.cgi?id=47552">47552</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Opportunity to improve codegen for i > l && l < h
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Common Code Generator Code
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>david.bolvansky@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>bool src (int i, int l, int h)
{
return i > l && l < h;
}
bool tgt (int i, int l, int h)
{
int p = i < h ? i : h;
return l < p;
}
Clang:
src(int, int, int): # @src(int, int, int)
cmp edi, esi
setg cl
cmp esi, edx
setl al
and al, cl
ret
tgt(int, int, int): # @tgt(int, int, int)
cmp edi, edx
cmovl edx, edi
cmp edx, esi
setg al
ret
----------------------------------------
define i1 @src(i32 %0, i32 %1, i32 %2) {
%3:
%4 = icmp sgt i32 %0, %1
%5 = icmp slt i32 %1, %2
%6 = and i1 %4, %5
ret i1 %6
}
=>
define i1 @tgt(i32 %0, i32 %1, i32 %2) {
%3:
%4 = icmp slt i32 %0, %2
%5 = select i1 %4, i32 %0, i32 %2
%6 = icmp sgt i32 %5, %1
ret i1 %6
}
Transformation seems to be correct!
----------------------------------------
define i1 @src(i32 %0, i32 %1, i32 %2) {
%3:
%4 = icmp sgt i32 %0, %1
%5 = icmp slt i32 %1, %2
%6 = and i1 %4, %5
ret i1 %6
}
=>
define i1 @tgt(i32 %0, i32 %1, i32 %2) {
%3:
%4 = icmp slt i32 %0, %2
%5 = select i1 %4, i32 %0, i32 %2
%6 = icmp sgt i32 %5, %1
ret i1 %6
}
Transformation seems to be correct!
So maybe request for X86 backend? For ARM this could be useful too..
ARM8:
src(int, int, int): // @src(int, int, int)
cmp w0, w1
cset w8, gt
cmp w1, w2
cset w9, lt
and w0, w8, w9
ret
tgt(int, int, int): // @tgt(int, int, int)
cmp w0, w2
csel w8, w0, w2, lt
cmp w8, w1
cset w0, gt
ret</pre>
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