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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - DAGCombine of ARMISD::SUBC gets stuck in an infinite loop"
href="https://bugs.llvm.org/show_bug.cgi?id=47366">47366</a>
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<th>Summary</th>
<td>DAGCombine of ARMISD::SUBC gets stuck in an infinite loop
</td>
</tr>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>11.0
</td>
</tr>
<tr>
<th>Hardware</th>
<td>All
</td>
</tr>
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<th>OS</th>
<td>All
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: ARM
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>simonas+llvm.org@kazlauskas.me
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org, smithp352@googlemail.com, Ties.Stuij@arm.com
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<p>
<div>
<pre>Given the following LLVM-IR derived by bugpoint and then some cleanup by me:
target triple = "thumbv6m-none-unknown-eabi"
define i1 @hangit() unnamed_addr {
start:
%0 = tail call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 undef,
i128 undef)
%1 = extractvalue { i128, i1 } %0, 1
%2 = select i1 %1, i128 18446744073709551616, i128 0
%3 = tail call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 undef,
i128 %2)
%4 = extractvalue { i128, i1 } %3, 1
ret i1 %4
}
declare { i128, i1 } @llvm.uadd.with.overflow.i128(i128, i128)
When built with `llc`, the build will hang. This is confirmed to happen with
both 10.0.1 and very recent master (8e5b1557e5b3)
DAGCombine will get stuck in the following loop:
Replacing.1 t106: i32,i32 = ARMISD::SUBC t79, Constant:i32<1>
With: t106: i32,i32 = ARMISD::SUBC t79, Constant:i32<1>
and 1 other values
Legalizing: t79: i32,i32 = ARMISD::ADDE Constant:i32<0>, Constant:i32<0>,
t78:1
Legal node: nothing to do
Combining: t79: i32,i32 = ARMISD::ADDE Constant:i32<0>, Constant:i32<0>,
t78:1
Legalizing: t78: i32,i32 = ARMISD::ADDE undef:i32, undef:i32, t82:1
Legal node: nothing to do
Combining: t78: i32,i32 = ARMISD::ADDE undef:i32, undef:i32, t82:1
Legalizing: t106: i32,i32 = ARMISD::SUBC t79, Constant:i32<1>
Legal node: nothing to do
Combining: t106: i32,i32 = ARMISD::SUBC t79, Constant:i32<1>
Replacing.1 t106: i32,i32 = ARMISD::SUBC t79, Constant:i32<1>
With: t106: i32,i32 = ARMISD::SUBC t79, Constant:i32<1>
and 1 other values
ad nauseam.</pre>
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