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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Expressions with side-effects (including function calls) should not appear in assert().（llvm-project/llvm/utils/TableGen/RegisterInfoEmitter.cpp: line 1291 ）"
href="https://bugs.llvm.org/show_bug.cgi?id=47072">47072</a>
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<th>Summary</th>
<td>Expressions with side-effects (including function calls) should not appear in assert().（llvm-project/llvm/utils/TableGen/RegisterInfoEmitter.cpp: line 1291 ）
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Object
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>info@ustchcs.com
</td>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<pre>Expressions with side-effects (including function calls) should not appear in
assert().
commit e3546c78cabfbf670391a57766872f0a8e28a423
llvm-project/llvm/utils/TableGen/RegisterInfoEmitter.cpp: line 1291
1290 for (const auto &RC : RegisterClasses) {
1291 assert(RC.EnumValue == EV++ && "Unexpected order of register
classes");
1292 (void)EV;
1293 const RegSizeInfo &RI = RC.RSI.get(M);
1294 OS << " { " << RI.RegSize << ", " << RI.SpillSize << ", "
1295 << RI.SpillAlignment;
1296 std::vector<MVT::SimpleValueType> VTs;
1297 for (const ValueTypeByHwMode &VVT : RC.VTs)
1298 VTs.push_back(VVT.get(M).SimpleTy);
1299 OS << ", VTLists+" << VTSeqs.get(VTs) << " }, // "
1300 << RC.getName() << '\n';
1301 }
1302 }
Reported by: Ustchcs Toolsets Bugfinder
(bugfinder-13.2: Expressions with side-effects (including function calls)
should not appear in assert().)</pre>
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