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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - {disp32} instruction modifier not supported"
   href="https://bugs.llvm.org/show_bug.cgi?id=46650">46650</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>{disp32} instruction modifier not supported
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>thiago@kde.org
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>void f()
{
    asm volatile("{disp32} jmp 0f\n"
    "0:\n")
}

GNU assembler supports this and will generate a 32-bit displacement (near) JMP
instruction instead of the 8-bit (short) that can be encoded. Very rare
use-case, but we needed for a specific application that performs hot-patching.

Problem can be worked around using -fno-integrated-as.

FYI, full list of "pseudo prefixes" from GAS documentation:

   * '{disp8}' - prefer 8-bit displacement.

   * '{disp32}' - prefer 32-bit displacement.

   * '{load}' - prefer load-form instruction.

   * '{store}' - prefer store-form instruction.

   * '{vex}' - encode with VEX prefix.

   * '{vex3}' - encode with 3-byte VEX prefix.

   * '{evex}' - encode with EVEX prefix.

   * '{rex}' - prefer REX prefix for integer and legacy vector
     instructions (x86-64 only).  Note that this differs from the 'rex'
     prefix which generates REX prefix unconditionally.

   * '{nooptimize}' - disable instruction size optimization.</pre>
        </div>
      </p>


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