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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86][AVX] Avoid vpsrlq $32, %xmm, %xmm split in v4u64 uint2fp v4f64"
href="https://bugs.llvm.org/show_bug.cgi?id=46621">46621</a>
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<th>Summary</th>
<td>[X86][AVX] Avoid vpsrlq $32, %xmm, %xmm split in v4u64 uint2fp v4f64
</td>
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<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
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<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
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<pre>Codegen: <a href="https://godbolt.org/z/Kz72eo">https://godbolt.org/z/Kz72eo</a>
For AVX1 only targets, the v4u64 -> v4f64 uint2fp conversion:
define <4 x double> @cvt_v4u64_v4f64(4 x i64> %0) {
%2 = uitofp <4 x i64> %0 to <4 x double>
ret <4 x double> %2
}
cvt_v4u64_v4f64:
vxorps %xmm1, %xmm1, %xmm1
vblendps $170, %ymm1, %ymm0, %ymm1 # ymm1 =
ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]
vpsrlq $32, %xmm0, %xmm2
vextractf128 $1, %ymm0, %xmm0
vorps .LCPI0_0(%rip), %ymm1, %ymm1
vpsrlq $32, %xmm0, %xmm0
vinsertf128 $1, %xmm0, %ymm2, %ymm0
vorpd .LCPI0_1(%rip), %ymm0, %ymm0
vsubpd .LCPI0_2(%rip), %ymm0, %ymm0
vaddpd %ymm0, %ymm1, %ymm0
retq
we should be able to avoid the extractf128+2*vpsrlq and perform this as 256-bit
vshufps*2 instead, reducing register pressure.
I'm not sure yet whether this is better to handle in shuffle combining, in
TargetLowering::expandUINT_TO_FP or shift lowering.</pre>
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