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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Register allocation does not keep loop-incremented variables in same register, leading to unnecessary register-to-register copies"
href="https://bugs.llvm.org/show_bug.cgi?id=46066">46066</a>
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<th>Summary</th>
<td>Register allocation does not keep loop-incremented variables in same register, leading to unnecessary register-to-register copies
</td>
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<th>Product</th>
<td>new-bugs
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<th>Version</th>
<td>10.0
</td>
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<th>Hardware</th>
<td>Other
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>new bugs
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>heikki.kultala@gmail.com
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<th>CC</th>
<td>htmldeveloper@gmail.com, llvm-bugs@lists.llvm.org
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<pre>Created <span class=""><a href="attachment.cgi?id=23529" name="attach_23529" title="C code causing this inefficient code generation">attachment 23529</a> <a href="attachment.cgi?id=23529&action=edit" title="C code causing this inefficient code generation">[details]</a></span>
C code causing this inefficient code generation
It would seem that the default register allocator is really bad at keeping
variables that are incremented inside loop in the same register, causing lots
of extra register-to-register copies.
C Code:
extern short* A;
extern short* B;
extern short* C;
extern short* end;
int main(void) {
short* a = A;
short* b = B;
short* c = C;
do {
*a++ = *b++ + *c++;
} while (b != end);
}
The assembly of the loop, compiled to riscv32 with -O3 becomes:
lh a4, 0(a2)
lh a5, 0(a3)
addi a1, a2, 2 # this stupidly changes register of the value
addi a3, a3, 2
add a2, a5, a4
addi a4, a0, 2 # this stupidly changes register of the value
sh a2, 0(a0)
add a0, zero, a4 # unnecessary register-to-register move
add a2, zero, a1 # unnecessary register-to-register move
bne a6, a1, .LBB0_1
If the pointers would always stay in the same registers(a0, a2, a3), the code
would be 2 instructions shorter:
lh a4, 0(a2)
lh a5, 0(a3)
addi a2, a2, 2
addi a3, a3, 2
add a1, a5, a4
sh a1, 0(a0)
addi a0, a0, 2 # this gets moved after the store due WaR
bne a6, a2, .LBB0_1
I have encountered the same effect on some other architectures too, but this
case with risc-v was the most clear one, so using this as the example.</pre>
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