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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - X86InterleavedAccess introduces misaligned loads"
   href="https://bugs.llvm.org/show_bug.cgi?id=45957">45957</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>X86InterleavedAccess introduces misaligned loads
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Keywords</th>
          <td>miscompilation
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>nunoplopes@sapo.pt
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>craig.topper@gmail.com, juneyoung.lee@sf.snu.ac.kr, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, regehr@cs.utah.edu, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>See here:
<a href="https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/X86/X86InterleavedAccess.cpp#L219">https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/X86/X86InterleavedAccess.cpp#L219</a>

    Value *NewBasePtr =
        Builder.CreateGEP(VecBaseTy, VecBasePtr, Builder.getInt32(i));
    Instruction *NewLoad =
        Builder.CreateAlignedLoad(VecBaseTy, NewBasePtr, LI->getAlign());

Newly created loads inherit the original load's alignment. This is not correct,
as the original load may have a larger alignment than the GEP done above.

A concrete failure we see is in:
Transforms/InterleavedAccess/X86/interleavedLoad.ll

define <32 x i8> @interleaved_load_vf32_i8_stride3(* %ptr) {
  %wide.vec = load <96 x i8>, * %ptr, align 128
...
}
=>
define <32 x i8> @interleaved_load_vf32_i8_stride3(* %ptr) {
  %1 = bitcast * %ptr to *
  %2 = gep * %1, 16 x i32 0
  %3 = load <16 x i8>, * %2, align 128  ; <-- this is not 128-byte aligned
  %4 = gep * %1, 16 x i32 1
  %5 = load <16 x i8>, * %4, align 128
  %6 = gep * %1, 16 x i32 2
  %7 = load <16 x i8>, * %6, align 128
...
}


Report:
<a href="https://web.ist.utl.pt/nuno.lopes/alive2/index.php?hash=72296a443c683892&test=Transforms%2FInterleavedAccess%2FX86%2FinterleavedLoad.ll">https://web.ist.utl.pt/nuno.lopes/alive2/index.php?hash=72296a443c683892&test=Transforms%2FInterleavedAccess%2FX86%2FinterleavedLoad.ll</a></pre>
        </div>
      </p>


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