<html>
    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86][SSE] Improve combining to ISD::MULHS/MULHU"
   href="https://bugs.llvm.org/show_bug.cgi?id=45897">45897</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[X86][SSE] Improve combining to ISD::MULHS/MULHU
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>This is a general bug/brain dump to cover a few areas that we might want to
consider to encourage use of the vXi16 ISD::MULHS/MULHU opcodes where possible
as they can give notable perf improvements over vXi32 multiples.

1 - Move the PPC combines from <a href="https://reviews.llvm.org/D78272">https://reviews.llvm.org/D78272</a> into DAGCombiner
if x86 can benefit as well.

2 - X86ISelLowering.cpp - combinePMULH currently performs:

    vXi16 trunc(srl(mul({sz}ext(x),{sz}ext(y)),16)) -> vXi16 mulh{sz}(x,y)

But it might be beneficial to combine any x/y with sufficient leading sign/zero
bits - it depends on how cheap the truncation will be (PACKS/VTRUNC/nop/???)
compared to the penalty of the wider multiply/shift:

    vXi16 trunc(srl(mul(x,y),16)) -> vXi16 mulh{sz}(trunc(x),trunc(y))

3 - Try to perform more truncation style combines even after combining to
PACKS/VTRUNC ops. We can probably still see the truncation pattern behind the
op, so maybe a SelectionDAG::simplifyTrunc() would be useful or a x86-only
combineTruncLike? Or at the very least try to match the SimplifyDemandedBits
calls we have for ISD::TRUNCATE.

4 - See if [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86][SSE] Add ISD::MULHS/MULHU vXi64 support"
   href="show_bug.cgi?id=38423">Bug #38423</a>] would still be useful - does
SimplifyDemandedBits/shuffle combining always simplify the vXi64 mul expansion
for us?</pre>
        </div>
      </p>


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