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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - Infinite shuffle+extract legalization loop"
   href="https://bugs.llvm.org/show_bug.cgi?id=44069">44069</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>Infinite shuffle+extract legalization loop
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>aemerson@apple.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>The following IR causes a hang with llc -O0 on x86:

define hidden void @foo() unnamed_addr #0 align 2 {
entry:
  %0 = load <4 x float>, <4 x float>* undef, align 16
  %vecext.i4849 = extractelement <4 x float> %0, i32 0
  %1 = load <4 x i32>, <4 x i32>* null, align 16
  %permil281 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1,
i32 1, i32 1, i32 1>
  %2 = bitcast <4 x i32> %permil281 to <4 x float>
  %vecext1.i4794 = extractelement <4 x float> %2, i32 0
  %sub.i4795 = fsub float %vecext1.i4794, %vecext.i4849
  %vecins.i4796 = insertelement <4 x float> %2, float %sub.i4795, i32 0
  store <4 x float> %vecins.i4796, <4 x float>* undef, align 16
  unreachable
}

attributes #0 = { "use-soft-float"="false" }


It seems that there's a combine in X86ISelLowering in
XFormVExtractWithShuffleIntoLoad() which is matching the load->shuffle->extract
element and then generating another shuffle->extractelement, which I assume is
intended for further optimization by DAGCombine. However, it just up in a
legalization loop on the extract.</pre>
        </div>
      </p>


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