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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [AARCH64] vector zext hangs/crashes with NEON disabled"
   href="https://bugs.llvm.org/show_bug.cgi?id=43719">43719</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[AARCH64] vector zext hangs/crashes with NEON disabled
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>Other
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AArch64
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>husseydevin@gmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>arnaud.degrandmaison@arm.com, llvm-bugs@lists.llvm.org, peter.smith@linaro.org, Ties.Stuij@arm.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>define @zext_v2xi32(<2 x i32> %vec)
{
    %extended = zext <2 x i32> %vec to <2 x i64>
    ret <2 x i64> %extended
}

llc -march=aarch64 -mattr=-neon

I would expect something like this (if I am correct in that <2 x i32> is passed
as i32 *):

zext_v2xi32:
    ldp   w0, w1, [x0]
    ret

But instead, I either get a segfault (on Termux's 8.0.1 build), or an infinite
loop (9.0.0 on archlinuxarm or trunk w/debug). With every other known
architecture, SIMD types still scalarize properly with SIMD disabled, given
that llvm intrinsics aren't used.

Enabling debug output in llc spams this:

Combining: t7: i64 = Constant<0>

Combining: t6: v2i64 = zero_extend t5
Creating new node: tNNNNN: v1i64 = extract_subvector t6, Constant:i64<0>
Creating new node: tNNNNN+1: v1i64 = extract_subvector t6, Constant:i64<1></pre>
        </div>
      </p>


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