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    <head>
      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Use combineLogicBlendIntoConditionalNegate for SSSE3+ targets"
   href="https://bugs.llvm.org/show_bug.cgi?id=43660">43660</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[X86] Use combineLogicBlendIntoConditionalNegate for SSSE3+ targets
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Current Codegen: <a href="https://gcc.godbolt.org/z/mmT1B1">https://gcc.godbolt.org/z/mmT1B1</a>

As mentioned on D62777, basic SSE2 targets manage to simplify:

define <16 x i8> @non_splat_minus_one_divisor_0(<16 x i8> %A) {
  %div = sdiv <16 x i8> %A, <i8 -1, i8 -1, i8 1, i8 -1, i8 -1, i8 -1, i8 1, i8
-1, i8 -1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  ret <16 x i8> %div
}

to:

non_splat_minus_one_divisor_0: # @non_splat_minus_one_divisor_0
  movdqa .LCPI0_0(%rip), %xmm1 # xmm1 =
[0,0,255,0,0,0,255,0,0,255,255,255,255,255,255,255]
  pxor %xmm1, %xmm0
  psubb %xmm0, %xmm1
  movdqa %xmm1, %xmm0
  retq

but later targets end up with:

non_splat_minus_one_divisor_0: # @non_splat_minus_one_divisor_0
  pxor %xmm1, %xmm1
  psubb %xmm0, %xmm1
  pshufb .LCPI0_0(%rip), %xmm1 # xmm1 =
xmm1[0,1],zero,xmm1[3,4,5],zero,xmm1[7,8],zero,zero,zero,zero,zero,zero,zero
  pshufb .LCPI0_1(%rip), %xmm0 # xmm0 =
zero,zero,xmm0[2],zero,zero,zero,xmm0[6],zero,zero,xmm0[9,10,11,12,13,14,15]
  por %xmm1, %xmm0
  retq

or (after SSE41):

non_splat_minus_one_divisor_0: # @non_splat_minus_one_divisor_0
  vmovdqa .LCPI0_0(%rip), %xmm2 # xmm2 =
[0,0,255,0,0,0,255,0,0,255,255,255,255,255,255,255]
  vpxor %xmm1, %xmm1, %xmm1
  vpsubb %xmm0, %xmm1, %xmm1
  vpblendvb %xmm2, %xmm0, %xmm1, %xmm0
  retq</pre>
        </div>
      </p>


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