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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Merge r372186 and r372187 to 9.0 branch: [ARM] VFPv2 only supports 16 D registers."
href="https://bugs.llvm.org/show_bug.cgi?id=43365">43365</a>
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<th>Summary</th>
<td>Merge r372186 and r372187 to 9.0 branch: [ARM] VFPv2 only supports 16 D registers.
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<th>Product</th>
<td>libraries
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<th>Version</th>
<td>trunk
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: ARM
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>efriedma@quicinc.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org, oliver.stannard@arm.com, peter.smith@linaro.org, t.p.northover@gmail.com, Ties.Stuij@arm.com
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<pre>These fix a very easy to reproduce miscompile if the user specifies -mfpu=vfpv2
(or an equivalent -mcpu flag). Probably not that important for general usage,
since it only affects pre-v7 ARM targets with an FPU, but it's a showstopper if
you need to target one of those specific CPUs.
Should be low risk in terms of correctness, but I'm not sure whether we're
allowed to remove target features in a point release. Maybe on the branch we
could keep the "vfp2d16" and "vfp2d16sp" target features, but make them no-ops.</pre>
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