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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [GlobalISel] When widening from non-power of 2, Legalizer assumes zero-extending loads"
href="https://bugs.llvm.org/show_bug.cgi?id=43288">43288</a>
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<th>Summary</th>
<td>[GlobalISel] When widening from non-power of 2, Legalizer assumes zero-extending loads
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>All
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>GlobalISel
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>alex.davies@iinet.net.au
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org, quentin.colombet@gmail.com
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<pre>Legalizer assumes G_LOAD clears upper bits.
This is clearest in the comments:
// Our strategy here is to generate anyextending loads for the smaller
// types up to next power-2 result type, and then combine the two
larger
// result values together, before truncating back down to the non-pow-2
// type.
// E.g. v1 = i24 load =>
// v2 = i32 load (2 byte)
// v3 = i32 load (1 byte)
// v4 = i32 shl v3, 16
// v5 = i32 or v4, v2
// v1 = i24 trunc v5
v2 receives an G_ANYEXT load, so upper 16 bits are undefined. v5 then ors these
upper bits, and hopes to get something meaningful from the result => bug.
Proposed fix:
// E.g. v1 = i24 load =>
// v2 = zext(i16 load (2 byte))
// v3 = i32 load (1 byte)
And in code:
auto LargeLoad =
MIRBuilder.buildLoad(LargeLdReg, PtrReg, *LargeMMO);
becomes:
auto LargeLoad = MIRBuilder.buildZExt(LargeLdReg,
MIRBuilder.buildLoad(LLT::scalar(LargeSplitSize), PtrReg, *LargeMMO));
Despite the bug, the code _usually_ turns out correctly (until I managed to
break it adding a few more artifact combiners...), although this seems to be
mostly by luck as far as I can tell.</pre>
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