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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - An empty exit block produced by LoopSimplify increases spilling"
href="https://bugs.llvm.org/show_bug.cgi?id=43061">43061</a>
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<th>Summary</th>
<td>An empty exit block produced by LoopSimplify increases spilling
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>Linux
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Register Allocator
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>paulsson@linux.vnet.ibm.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org, quentin.colombet@gmail.com
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<div>
<pre>Created <span class=""><a href="attachment.cgi?id=22400" name="attach_22400" title="llc input">attachment 22400</a> <a href="attachment.cgi?id=22400&action=edit" title="llc input">[details]</a></span>
llc input
I was experimenting with a pre-isl loop pass and found that by running the
LoopSimplify pass I saw generally more spilling. This happened also when I
turned off my optimization, so that *only* canonicalization of loop was the
difference.
I am not sure this is something worth looking into, but it looks like a
potential area improvement since an empty block after a loop (exit block) by
itself does not change the register allocation problem.
llc -mcpu=z14 ./tc.mir -o out.0.s -start-before=greedy
llc -mcpu=z14 ./tc.emptyexitblock.mir -o out.1.s -start-before=greedy
out.1.s has one more spilled interval, around the loop. The only (real)
difference between the two mir files is:
< bb66: ; preds = %bb51, %bb19
---
<span class="quote">> bb66.loopexit: ; preds = %bb51
> br label %bb66</span >
>
<span class="quote">> bb66: ; preds = %bb66.loopexit,</span ></pre>
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