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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - X86ISelLowering.cpp:7692: llvm::SDValue EltsFromConsecutiveLoads(...): Assertion `EltBaseVT.getSizeInBits() == EltBaseVT.getStoreSizeInBits() && "Register/Memory size mismatch"' failed."
   href="https://bugs.llvm.org/show_bug.cgi?id=42909">42909</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>X86ISelLowering.cpp:7692: llvm::SDValue EltsFromConsecutiveLoads(...): Assertion `EltBaseVT.getSizeInBits() == EltBaseVT.getStoreSizeInBits() && "Register/Memory size mismatch"' failed.
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>bjorn.a.pettersson@ericsson.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=22348" name="attach_22348" title="Test case as generated by llvm-stress">attachment 22348</a> <a href="attachment.cgi?id=22348&action=edit" title="Test case as generated by llvm-stress">[details]</a></span>
Test case as generated by llvm-stress

An assertion has started to show up (probably after turning on
x86-experimental-vector-widening-legalization by default since it disappears
when disabling it).

When running

  llc -march=x86-64 -mcpu=corei7 -o - stress-300-31033.ll
-x86-experimental-vector-widening-legalization=1

we get

...
Combining: t137: v4i1 = vector_shuffle<u,1,5,u> t129, t176
llc: ../lib/Target/X86/X86ISelLowering.cpp:7692: llvm::SDValue
EltsFromConsecutiveLoads(llvm::EVT, ArrayRef<llvm::SDValue>, const llvm::SDLoc
&, llvm::SelectionDAG &, const llvm::X86Subtarget &, bool): Assertion
`EltBaseVT.getSizeInBits() == EltBaseVT.getStoreSizeInBits() &&
"Register/Memory size mismatch"' failed.
Stack dump:
0.      Program arguments: bin/llc -march=x86-64 -mcpu=corei7 -o -
stress-300-31033.ll -x86-experimental-vector-widening-legalization=1 -debug 
1.      Running pass 'Function Pass Manager' on module 'stress-300-31033.ll'.
2.      Running pass 'X86 DAG->DAG Instruction Selection' on function
'@autogen_SD31033'
 #0 0x0000000002345d94 PrintStackTraceSignalHandler(void*) (bin/llc+0x2345d94)
 #1 0x0000000002343a7e llvm::sys::RunSignalHandlers() (bin/llc+0x2343a7e)
 #2 0x0000000002346198 SignalHandler(int) (bin/llc+0x2346198)
 #3 0x0000003ba280f7e0 __restore_rt (/lib64/libpthread.so.0+0x3ba280f7e0)
 #4 0x0000003ba24324f5 raise (/lib64/libc.so.6+0x3ba24324f5)
 #5 0x0000003ba2433cd5 abort (/lib64/libc.so.6+0x3ba2433cd5)
 #6 0x0000003ba242b66e __assert_fail_base (/lib64/libc.so.6+0x3ba242b66e)
 #7 0x0000003ba242b730 __assert_perror_fail (/lib64/libc.so.6+0x3ba242b730)
 #8 0x000000000124b01c EltsFromConsecutiveLoads(llvm::EVT,
llvm::ArrayRef<llvm::SDValue>, llvm::SDLoc const&, llvm::SelectionDAG&,
llvm::X86Subtarget const&, bool) (bin/llc+0x124b01c)
 #9 0x00000000012ef06e combineShuffle(llvm::SDNode*, llvm::SelectionDAG&,
llvm::TargetLowering::DAGCombinerInfo&, llvm::X86Subtarget const&)
(bin/llc+0x12ef06e)
#10 0x00000000012b8541
llvm::X86TargetLowering::PerformDAGCombine(llvm::SDNode*,
llvm::TargetLowering::DAGCombinerInfo&) const (bin/llc+0x12b8541)
#11 0x000000000204008f (anonymous
namespace)::DAGCombiner::combine(llvm::SDNode*) (bin/llc+0x204008f)
#12 0x000000000203dbd4 llvm::SelectionDAG::Combine(llvm::CombineLevel,
llvm::AAResults*, llvm::CodeGenOpt::Level) (bin/llc+0x203dbd4)
#13 0x00000000021c6c18 llvm::SelectionDAGISel::CodeGenAndEmitDAG()
(bin/llc+0x21c6c18)
#14 0x00000000021c5c3c
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&)
(bin/llc+0x21c5c3c)
#15 0x00000000021c25d6
llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&)
(bin/llc+0x21c25d6)
#16 0x0000000001210b56 (anonymous
namespace)::X86DAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&)
(bin/llc+0x1210b56)
#17 0x000000000197d7c9
llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (bin/llc+0x197d7c9)
#18 0x0000000001cec403 llvm::FPPassManager::runOnFunction(llvm::Function&)
(bin/llc+0x1cec403)
#19 0x0000000001cec713 llvm::FPPassManager::runOnModule(llvm::Module&)
(bin/llc+0x1cec713)
#20 0x0000000001cecd7d llvm::legacy::PassManagerImpl::run(llvm::Module&)
(bin/llc+0x1cecd7d)
#21 0x0000000000788eae compileModule(char**, llvm::LLVMContext&)
(bin/llc+0x788eae)
#22 0x000000000078660d main (bin/llc+0x78660d)
#23 0x0000003ba241ed20 __libc_start_main (/lib64/libc.so.6+0x3ba241ed20)
#24 0x00000000007842a9 _start (bin/llc+0x7842a9)
Abort (core dumped)</pre>
        </div>
      </p>


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