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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [mca] Multiple reservation station handling"
href="https://bugs.llvm.org/show_bug.cgi?id=42307">42307</a>
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<th>Summary</th>
<td>[mca] Multiple reservation station handling
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<th>Product</th>
<td>tools
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>llvm-mca
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>lebedev.ri@gmail.com
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<th>CC</th>
<td>andrea.dibiagio@gmail.com, llvm-bugs@lists.llvm.org, matthew.davis@sony.com
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<pre>Created <span class=""><a href="attachment.cgi?id=22119" name="attach_22119" title="X86ScheduleBarcelona.td">attachment 22119</a> <a href="attachment.cgi?id=22119&action=edit" title="X86ScheduleBarcelona.td">[details]</a></span>
X86ScheduleBarcelona.td
Currently llvm-mca *seems* to only handle the case when there
is a single reservation station for a number of execution pipes.
That is more or less isn't the case for for -mcpu=amdfam10h
References:
* AMD Software Optimization Guide for AMD Family 10h and 12h Processors
<a href="https://support.amd.com/TechDocs/40546.pdf">https://support.amd.com/TechDocs/40546.pdf</a>
Appendix A Microarchitecture of AMD Family 10h and 12h Processors
* <a href="https://www.realworldtech.com/barcelona/">https://www.realworldtech.com/barcelona/</a>
* I think this is more or less stated as such in Agner, but not specifically
Bach of 6 pipes (3 integer, 3 fp) has it's own scheduler with it's own
reservation station.
But as you can see from test/tools/llvm-mca/X86/scheduler-queue-usage.s
it seems, MCA only currently recognizes this:
def BnInt : ProcResGroup<[BnInt0, BnInt1, BnInt2]> {
let BufferSize = 24;
}
^ only BnInt queue ever is being used.
A simple
def BnI0 : ProcResGroup<[BnInt0]> {
let BufferSize = 24;
}
isn't recognized, neither is
def BnInt0 : ProcResource<1> {
let BufferSize = 8;
}
Am i missing something truly obvious here?</pre>
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