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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - If-conversion fails to remove CPSR operand on thumb instructions, causing incorrect assembly"
href="https://bugs.llvm.org/show_bug.cgi?id=42285">42285</a>
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<th>Summary</th>
<td>If-conversion fails to remove CPSR operand on thumb instructions, causing incorrect assembly
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: ARM
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>john.brawn@arm.com
</td>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org, peter.smith@linaro.org, Ties.Stuij@arm.com
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<p>
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<pre>If you compile the following:
int a, b;
int c() { return b <= 0 && a && b && 7 / b ? b : b * a; }
with clang --target=arm-none-eabi -march=armv8-a -S -Os -mthumb then in the
assembly output you see
it eq
mulseq r0, r1, r0
This mulseq is invalid, and if you try to assemble it you get an invalid
instruction error. If you generate an object file directly though you get
it eq
muleq r0, r1, r0
which is correct.
What's going on here is that the 16-bit mul instruction is flags-setting
outside of an IT block, and non-flags-setting inside of it. This is modelled in
LLVM using an optional CPSR operand: if the operand is present then it's
flags-setting, if it's not then it's not. The CPSR operand is initially present
but marked as dead, then when deciding whether to predicate it
ARMBaseInstrInfo::isPredicable asks isEligibleForITBlock which asks
ARMBaseInstrInfo::isCPSRDefined which says CPSR is not defined as it's dead.
The logic deciding that it is safe to predicate the mul looks correct here, so
we just need to remove the dead CPSR operand. Looks like either
ARMBaseInstrInfo::PredicateInstruction or possibly
Thumb2ITBlockPass::InsertITInstructions would be the place to do this.</pre>
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