<html>
<head>
<base href="https://bugs.llvm.org/">
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] avx512vl vcvtps2pd isel patterns can narrow a volatile load"
href="https://bugs.llvm.org/show_bug.cgi?id=42079">42079</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[X86] avx512vl vcvtps2pd isel patterns can narrow a volatile load
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>craig.topper@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
</td>
</tr></table>
<p>
<div>
<pre>This IR will contains a volatile 128-bit load
define <2 x double> @test(<4 x float>* %x) {
%a = load volatile <4 x float>, <4 x float>* %x
%b = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
%c = fpext <2 x float> %b to <2 x double>
ret <2 x double> %c
}
When compiled with avx512f this assembly is produced which only loads 128 bits.
vcvtps2pd (%rdi), %xmm0
This is probably not the only example of this bug in our isel patterns.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>