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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Failure to use HADD for reduction add patterns"
href="https://bugs.llvm.org/show_bug.cgi?id=42023">42023</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[X86] Failure to use HADD for reduction add patterns
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
</td>
</tr></table>
<p>
<div>
<pre><a href="https://godbolt.org/z/g1wL8n">https://godbolt.org/z/g1wL8n</a>
define i32 @hadd32_4(<4 x i32> %x225) optsize {
%x226 = shufflevector <4 x i32> %x225, <4 x i32> undef, <4 x i32> <i32 2, i32
3, i32 undef, i32 undef>
%x227 = add <4 x i32> %x225, %x226
%x228 = shufflevector <4 x i32> %x227, <4 x i32> undef, <4 x i32> <i32 1, i32
undef, i32 undef, i32 undef>
%x229 = add <4 x i32> %x227, %x228
%x230 = extractelement <4 x i32> %x229, i32 0
ret i32 %x230
}
define i16 @hadd16_8(<8 x i16> %x223) optsize {
%x224 = shufflevector <8 x i16> %x223, <8 x i16> undef, <8 x i32> <i32 4, i32
5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%x225 = add <8 x i16> %x223, %x224
%x226 = shufflevector <8 x i16> %x225, <8 x i16> undef, <8 x i32> <i32 2, i32
3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%x227 = add <8 x i16> %x225, %x226
%x228 = shufflevector <8 x i16> %x227, <8 x i16> undef, <8 x i32> <i32 1, i32
undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%x229 = add <8 x i16> %x227, %x228
%x230 = extractelement <8 x i16> %x229, i32 0
ret i16 %x230
}
llc -mcpu=btver2
hadd32_4:
vpshufd $78, %xmm0, %xmm1 # xmm1 = xmm0[2,3,0,1]
vpaddd %xmm1, %xmm0, %xmm0
vphaddd %xmm0, %xmm0, %xmm0
vmovd %xmm0, %eax
retq
hadd16_8: # @hadd16_8
vpshufd $78, %xmm0, %xmm1 # xmm1 = xmm0[2,3,0,1]
vpaddw %xmm1, %xmm0, %xmm0
vpshufd $229, %xmm0, %xmm1 # xmm1 = xmm0[1,1,2,3]
vpaddw %xmm1, %xmm0, %xmm0
vphaddw %xmm0, %xmm0, %xmm0
vmovd %xmm0, %eax
retq
We should always be able to fold integer horizontal reduction patterns like
this, and fadd patterns if we are safe to reassociate.
Pulled out of [<a class="bz_bug_link
bz_status_NEW "
title="NEW - AVX-512: Horizontal add pattern match does not work on <16 x i32> vectors"
href="show_bug.cgi?id=33758">Bug #33758</a>] where we are still missing some (optsize) HADD cases
(see also <a href="https://godbolt.org/z/yP5CgS">https://godbolt.org/z/yP5CgS</a> ).</pre>
</div>
</p>
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