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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Scheduling info for DIV narrower than 64-bits is wrong on Skylake Server (and I assume Skylake Client too)"
href="https://bugs.llvm.org/show_bug.cgi?id=41983">41983</a>
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<th>Summary</th>
<td>Scheduling info for DIV narrower than 64-bits is wrong on Skylake Server (and I assume Skylake Client too)
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>brennan.vincent@gmail.com
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<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
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<p>
<div>
<pre>LLVM believes that 16, 32, and 64-bit divs on Skylake Server have a latency of
76 cycles and a throughput of one per 11 cycles:
<a href="https://github.com/llvm-mirror/llvm/blob/d8286e45afd6b6a8d34f3002f884b00e64406857/lib/Target/X86/X86SchedSkylakeServer.td#L141">https://github.com/llvm-mirror/llvm/blob/d8286e45afd6b6a8d34f3002f884b00e64406857/lib/Target/X86/X86SchedSkylakeServer.td#L141</a>
However, this is only close to accurate for 64-bit divs. Checking any resource
(Agner Fog, uops.info) shows that narrows divs are much faster.
On my own machine (Xeon W-2191B) I wrote a test program which is able to retire
a 32-bit div every 6 cycles, exactly matching Agner Fog's claim.
I don't have a machine to test on but I am guessing all of this is true on
Skylake Client as well.</pre>
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