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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Improve HADD/HSUB shuffle combining"
href="https://bugs.llvm.org/show_bug.cgi?id=41813">41813</a>
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<th>Summary</th>
<td>[X86] Improve HADD/HSUB shuffle combining
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
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</tr>
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<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
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<p>
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<pre>As noted in <a href="https://reviews.llvm.org/D61308">https://reviews.llvm.org/D61308</a>, we should try harder to combine
shuffles on either side of a HADD/HSUB instruction - possibly removing it in
the process. This may be true for PACK in some cases as well.
define <4 x float> @PR22377(<4 x float> %a, <4 x float> %b) {
; AVX-LABEL: PR22377:
; AVX: # %bb.0: # %entry
; AVX-NEXT: vhaddps %xmm0, %xmm0, %xmm1
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,1]
; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX-NEXT: retq
entry:
%s1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32
3, i32 1, i32 3>
%s2 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32
2, i32 0, i32 2>
%r2 = fadd <4 x float> %s1, %s2
%s3 = shufflevector <4 x float> %s2, <4 x float> %r2, <4 x i32> <i32 0, i32
4, i32 1, i32 5>
ret <4 x float> %s3
}
Under some circumstances we could even shuffle in +0.0f values into some lanes
so the HADD becomes inert.</pre>
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