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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [aarch64] llvm.experimental.reduce.{and, any} don't lower properly for boolean vectors"
href="https://bugs.llvm.org/show_bug.cgi?id=41635">41635</a>
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<th>Summary</th>
<td>[aarch64] llvm.experimental.reduce.{and, any} don't lower properly for boolean vectors
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AArch64
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
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<th>CC</th>
<td>arnaud.degrandmaison@arm.com, gonzalobg88@gmail.com, llvm-bugs@lists.llvm.org, peter.smith@linaro.org, Ties.Stuij@arm.com
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<pre>Split off from [<a class="bz_bug_link
bz_status_NEW "
title="NEW - llvm.experimental.reduce.{and, any} don't lower properly for boolean vectors"
href="show_bug.cgi?id=36702">Bug #36702</a>], AARCH64 generates poor code for boolean reduction
from generic IR - either with the llvm.experimental.vector.reduce intrinsics
(which expand to a shuffle reduction chain) or with bitcasts of the comparison
result mask:
<a href="https://godbolt.org/z/wchsJ6">https://godbolt.org/z/wchsJ6</a>
e.g.
## AArch64
LLVM6:
all_8x8:
ldr d0, [x0]
umov w8, v0.b[0]
umov w9, v0.b[1]
tst w8, #0xff
umov w10, v0.b[2]
cset w8, ne
tst w9, #0xff
cset w9, ne
tst w10, #0xff
umov w10, v0.b[3]
and w8, w8, w9
cset w9, ne
tst w10, #0xff
umov w10, v0.b[4]
and w8, w9, w8
cset w9, ne
tst w10, #0xff
umov w10, v0.b[5]
and w8, w9, w8
cset w9, ne
tst w10, #0xff
umov w10, v0.b[6]
and w8, w9, w8
cset w9, ne
tst w10, #0xff
umov w10, v0.b[7]
and w8, w9, w8
cset w9, ne
tst w10, #0xff
and w8, w9, w8
cset w9, ne
and w0, w9, w8
ret
any_8x8:
ldr d0, [x0]
umov w8, v0.b[0]
umov w9, v0.b[1]
orr w8, w8, w9
umov w9, v0.b[2]
orr w8, w8, w9
umov w9, v0.b[3]
orr w8, w8, w9
umov w9, v0.b[4]
orr w8, w8, w9
umov w9, v0.b[5]
orr w8, w8, w9
umov w9, v0.b[6]
orr w8, w8, w9
umov w9, v0.b[7]
orr w8, w8, w9
tst w8, #0xff
cset w0, ne
ret
Manually generated:
all_8x8:
ldr d0, [x0]
mov v0.d[1], v0.d[0]
uminv b0, v0.16b
fmov w8, s0
tst w8, #0xff
cset w0, ne
ret
any_8x8:
ldr d0, [x0]
mov v0.d[1], v0.d[0]
umaxv b0, v0.16b
fmov w8, s0
tst w8, #0xff
cset w0, ne
ret</pre>
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