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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][MC] Incorrect handling of register syntax R[X,Y]"
href="https://bugs.llvm.org/show_bug.cgi?id=41281">41281</a>
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<th>Summary</th>
<td>[AMDGPU][MC] Incorrect handling of register syntax R[X,Y]
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpreobrazhensky@luxoft.com
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</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>When parsing registers specified in syntax R[X,Y], assembler does not report an
error if X or Y do not fit in 32 bits. Instead, assembler silently truncates X
and the number of registers (Y-X+1) to 32 bits.
Examples:
// The following code is assembled without errors and result in the same
// code as "v_add_f64 v[0:1], v[0:1], v[1:2]"
v_add_f64 v[0:1], v[0:1], v[0xF00000001:0x2]
v_add_f64 v[0:1], v[0:1], v[0x1:0xF00000002]
In addition, assembler does not check if X or Y are negative. As a result, the
following code breaks assembler:
s_mov_b32 s1, s[0:-1]</pre>
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