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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - Regression in "[ARM] Add missing memory operands to a bunch of instructions", with error "Expected a variant SchedClass""
   href="https://bugs.llvm.org/show_bug.cgi?id=41231">41231</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>Regression in "[ARM] Add missing memory operands to a bunch of instructions", with error "Expected a variant SchedClass"
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: ARM
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>martin@martin.st
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>efriedma@quicinc.com, llvm-bugs@lists.llvm.org, peter.smith@linaro.org, Ties.Stuij@arm.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=21672" name="attach_21672" title="Reproduction source">attachment 21672</a> <a href="attachment.cgi?id=21672&action=edit" title="Reproduction source">[details]</a></span>
Reproduction source

Since SVN r356963, "[ARM] Add missing memory operands to a bunch of
instructions.", compilation of many different source files for
armv7-w64-mingw32 often fails with the error "Expected a variant SchedClass"

This can be reproduced with the attached reduced source file like this:

$ clang -target armv7-w64-mingw32 -c atrac-preproc.c -O3 -w
fatal error: error in backend: Expected a variant SchedClass
clang-9: error: clang frontend command failed with exit code 70 (use -v to see
invocation)
clang version 9.0.0 (trunk 356964) (llvm/trunk 356963)
Target: armv7-w64-windows-gnu
Thread model: posix</pre>
        </div>
      </p>


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