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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [Codegen] convert select+store to conditional stores or vice-versa?"
   href="https://bugs.llvm.org/show_bug.cgi?id=41145">41145</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[Codegen] convert select+store to conditional stores or vice-versa?
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Common Code Generator Code
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>spatel+llvm@rotateright.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>This is a reduction of 1 part of the problem noted in the post-commit thread
for r355741 - [x86] scalarize extract element 0 of FP cmp:
<a href="http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190311/635516.html">http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190311/635516.html</a>

In that case, we have IR with a select and repeated identical compare
conditions (courtesy of CGP), and we're generating the x86 SSE (no blendv)
bitwise select sequence for it, but before r355741 it was getting converted to
compare and branch.

We don't appear to do that transform consistently, so I'm not sure if we want
to blame that exact example on something else, but here's a generalization:

target triple = "x86_64-unknown-unknown"

define void @select_store(double %x, double %y, double %z, double %w, double*
%p) {
entry:
  %cmp = fcmp ult double %x, %y
  %sel = select i1 %cmp, double %z, double %w
  store double %sel, double* %p
  ret void
}

define void @branch_store(double %x, double %y, double %z, double %w, double*
%p) {
entry:
  %cmp = fcmp ult double %x, %y
  br i1 %cmp, label %t, label %f

t:
  store double %z, double* %p
  ret void

f:
  store double %w, double* %p
  ret void
}

-----------------------------------------------------------------------------

select_store:
        cmpnlesd        %xmm0, %xmm1
        andpd   %xmm1, %xmm2
        andnpd  %xmm3, %xmm1
        orpd    %xmm2, %xmm1
        movsd   %xmm1, (%rdi)
        retq

branch_store: 
        ucomisd %xmm1, %xmm0
        jae     .LBB1_2
# %bb.1:                                # %t
        movsd   %xmm2, (%rdi)
        retq
.LBB1_2:                                # %f
        movsd   %xmm3, (%rdi)
        retq

-----------------------------------------------------------------------------

Absent any profile info, we should be picking one form or the other?

Note: SimplifyCFG doesn't appear to do anything with these in IR either. There
are a bunch of debug options that would seem to apply, but I don't see any
differences using those.</pre>
        </div>
      </p>


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