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      <base href="https://bugs.llvm.org/">
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    <body><span class="vcard"><a class="email" href="mailto:aemerson@apple.com" title="Amara Emerson <aemerson@apple.com>"> <span class="fn">Amara Emerson</span></a>
</span> changed
          <a class="bz_bug_link 
          bz_status_RESOLVED  bz_closed"
   title="RESOLVED INVALID - [GlobalISel] [aarch64] i1 boolean is still signed extended to -1"
   href="https://bugs.llvm.org/show_bug.cgi?id=41001">bug 41001</a>
          <br>
             <table border="1" cellspacing="0" cellpadding="8">
          <tr>
            <th>What</th>
            <th>Removed</th>
            <th>Added</th>
          </tr>

         <tr>
           <td style="text-align:right;">Status</td>
           <td>NEW
           </td>
           <td>RESOLVED
           </td>
         </tr>

         <tr>
           <td style="text-align:right;">Resolution</td>
           <td>---
           </td>
           <td>INVALID
           </td>
         </tr></table>
      <p>
        <div>
            <b><a class="bz_bug_link 
          bz_status_RESOLVED  bz_closed"
   title="RESOLVED INVALID - [GlobalISel] [aarch64] i1 boolean is still signed extended to -1"
   href="https://bugs.llvm.org/show_bug.cgi?id=41001#c2">Comment # 2</a>
              on <a class="bz_bug_link 
          bz_status_RESOLVED  bz_closed"
   title="RESOLVED INVALID - [GlobalISel] [aarch64] i1 boolean is still signed extended to -1"
   href="https://bugs.llvm.org/show_bug.cgi?id=41001">bug 41001</a>
              from <span class="vcard"><a class="email" href="mailto:aemerson@apple.com" title="Amara Emerson <aemerson@apple.com>"> <span class="fn">Amara Emerson</span></a>
</span></b>
        <pre>This looks correct, although w8 has a #-1 value, it later gets AND'd with 0x1
to do a zext-in-reg from s1 to s32. This is what I currently get at -O0:

; %bb.0:                                ; %entry
        sub     sp, sp, #32             ; =32
        stp     x29, x30, [sp, #16]     ; 16-byte Folded Spill
        add     x29, sp, #16            ; =16
        mov     w8, #-1
        str     x0, [sp, #8]
        ldr     x0, [sp, #8]
        orr     w9, wzr, #0x1
        and     w8, w8, w9. ; #-1 here becomes #1
        str     x0, [sp]                ; 8-byte Folded Spill
        mov     x0, x8
        ldr     x10, [sp]               ; 8-byte Folded Reload
        blr     x10
        ldp     x29, x30, [sp, #16]     ; 16-byte Folded Reload
        add     sp, sp, #32             ; =32
        ret</pre>
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      </p>


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