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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Regression from llvm-6: llvm-7 replaces 'undef' with 'NaN', and generates NaN at the assembler level."
href="https://bugs.llvm.org/show_bug.cgi?id=40690">40690</a>
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<th>Summary</th>
<td>Regression from llvm-6: llvm-7 replaces 'undef' with 'NaN', and generates NaN at the assembler level.
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>7.0
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: AMDGPU
</td>
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<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>patrick9876@free.fr
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>This issue is a regression for mesa / radeonsi; Indeed, this generation of NaN
at the assembler level yield to some fragments shader displaying a black
screen. For instance, these two fragments shader display this faulty behavior:
<a href="https://www.shadertoy.com/view/ltl3WS">https://www.shadertoy.com/view/ltl3WS</a> and <a href="https://www.shadertoy.com/view/MdVcRd">https://www.shadertoy.com/view/MdVcRd</a>
This issue is related mainly to commit:
fc21165c2319cc584f221c7deffeeff28cbe46d3 and
2f6b67546d390b7aaf74d6eb2e349dc79318b2ee by Sanjay Patel
<a href="mailto:spatel@rotateright.com">spatel@rotateright.com</a>.
Here are the differences of code generation without these two commits and with,
for the first fragment shader:
18,21c18,21
< %TEMP2.w.0 = phi float [ fmul (float fadd (float undef, float
1.000000e+00), float fmul (float 1.000000e+00, float fdiv (float 1.000000e+00,
float fadd (float undef, float 1.000000e+00)))), %main_body ], [ %170, %endif13
]
< %TEMP2.z.0 = phi float [ fmul (float fadd (float undef, float
1.000000e+00), float fmul (float 1.000000e+00, float fdiv (float 1.000000e+00,
float fadd (float undef, float 1.000000e+00)))), %main_body ], [ %169, %endif13
]
< %TEMP2.y.0 = phi float [ fmul (float fadd (float undef, float
1.000000e+00), float fmul (float 1.000000e+00, float fdiv (float 1.000000e+00,
float fadd (float undef, float 1.000000e+00)))), %main_body ], [ %168, %endif13
]
< %TEMP2.x.0 = phi float [ fmul (float fadd (float undef, float
1.000000e+00), float fmul (float 1.000000e+00, float fdiv (float 1.000000e+00,
float fadd (float undef, float 1.000000e+00)))), %main_body ], [ %167, %endif13
]
---
<span class="quote">> %TEMP2.w.0 = phi float [ 0x7FF8000000000000, %main_body ], [ %phitmp, %endif13 ]
> %TEMP2.z.0 = phi float [ 0x7FF8000000000000, %main_body ], [ %169, %endif13 ]
> %TEMP2.y.0 = phi float [ 0x7FF8000000000000, %main_body ], [ %168, %endif13 ]
> %TEMP2.x.0 = phi float [ 0x7FF8000000000000, %main_body ], [ %167, %endif13 ]</span >
168a169
<span class="quote">> %phitmp = fmul nsz float %170, 0x3F50624DE0000000</span >
175,183c176,183
< %175 = fmul nsz float %TEMP2.w.0, 0x3F50624DE0000000
< %176 = bitcast float %4 to i32
< %177 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float,
float, float, float, float, float, float, float, float, float, float, float }>
undef, i32 %176, 4
< %178 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float,
float, float, float, float, float, float, float, float, float, float, float }>
%177, float %172, 5
< %179 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float,
float, float, float, float, float, float, float, float, float, float, float }>
%178, float %173, 6
< %180 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float,
float, float, float, float, float, float, float, float, float, float, float }>
%179, float %174, 7
< %181 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float,
float, float, float, float, float, float, float, float, float, float, float }>
%180, float %175, 8
< %182 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float,
float, float, float, float, float, float, float, float, float, float, float }>
%181, float %20, 19
< ret <{ i32, i32, i32, i32, i32, float, float, float, float, float, float,
float, float, float, float, float, float, float, float, float }> %182
---
<span class="quote">> %175 = bitcast float %4 to i32
> %176 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %175, 4
> %177 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %176, float %172, 5
> %178 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %177, float %173, 6
> %179 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %178, float %174, 7
> %180 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %179, float %TEMP2.w.0, 8
> %181 = insertvalue <{ i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %180, float %20, 19
> ret <{ i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %181</span >
The issue is mainly the generation of the ‘NaN’ at the code level. This is an
aggressive simplification, and the generated ‘NaN’ must be removed. A stage
replacing again the ‘NaN’ with ‘undef’ is likely required. What do you think?</pre>
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