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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [x86, AVX512] failed to merge mask select across extract_subvector"
href="https://bugs.llvm.org/show_bug.cgi?id=40332">40332</a>
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<th>Summary</th>
<td>[x86, AVX512] failed to merge mask select across extract_subvector
</td>
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<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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</tr>
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<th>Reporter</th>
<td>spatel+llvm@rotateright.com
</td>
</tr>
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<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
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<p>
<div>
<pre>As noted in <a href="https://reviews.llvm.org/D56756">https://reviews.llvm.org/D56756</a> - we have this and similar
regression tests in test/CodeGen/X86/avx512-shuffles/partial_permute.ll:
define <4 x i32> @test_masked_z_8xi32_to_4xi32_perm_mask3(<8 x i32> %vec, <4 x
i32> %mask) {
; CHECK-LABEL: test_masked_z_8xi32_to_4xi32_perm_mask3:
; CHECK: # %bb.0:
; CHECK-NEXT: vmovdqa {{.*#+}} ymm2 = <5,3,2,5,u,u,u,u>
; CHECK-NEXT: vpermd %ymm0, %ymm2, %ymm0
; CHECK-NEXT: vptestnmd %xmm1, %xmm1, %k1
; CHECK-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
%shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <4 x i32> <i32 5, i32
3, i32 2, i32 5>
%cmp = icmp eq <4 x i32> %mask, zeroinitializer
%res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer
ret <4 x i32> %res
}
Ideally, the masking would be included in the shuffle:
vmovdqa {{.*#+}} ymm2 = <5,3,2,5,u,u,u,u>
vptestnmd %xmm1, %xmm1, %k1
vpermd %ymm0, %ymm2, %ymm0 {%k1} {z}</pre>
</div>
</p>
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