<html>
<head>
<base href="https://bugs.llvm.org/">
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [Mips] FastISel fails to mask branch conditions"
href="https://bugs.llvm.org/show_bug.cgi?id=40325">40325</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[Mips] FastISel fails to mask branch conditions
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: MIPS
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>nikita.ppv@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>Originally reported at: <a href="https://github.com/rust-lang/rust/issues/57631">https://github.com/rust-lang/rust/issues/57631</a>
Test case:
define void @test(i32 %x, i1* %p) {
%y = and i32 %x, 1
%c = icmp eq i32 %y, 1
store i1 %c, i1* %p
br i1 %c, label %foo, label %foo
foo:
ret void
}
Running this through llc -march=mipsel -mcpu=mips32 -relocation-model=pic -O0
gives:
# %bb.0:
move $1, $4
andi $4, $4, 1
sb $4, 0($5)
bgtz $1, $BB0_1
nop
# %bb.1: # %foo
jr $ra
nop
While the sb is correct, the bgtz argument is the unmasked function argument.
The cause is very similar to <a class="bz_bug_link
bz_status_RESOLVED bz_closed"
title="RESOLVED FIXED - [WebAssembly] Incorrect FastISel of icmp + zext due to missing masking"
href="show_bug.cgi?id=40172">https://bugs.llvm.org/show_bug.cgi?id=40172</a>. In
<a href="https://github.com/llvm-mirror/llvm/blob/00f59269287658489eda6279e52ae058dc686c96/lib/Target/Mips/MipsFastISel.cpp#L955">https://github.com/llvm-mirror/llvm/blob/00f59269287658489eda6279e52ae058dc686c96/lib/Target/Mips/MipsFastISel.cpp#L955</a>
an icmp result stored in an i32 virtual register is assumed to have only value
0 or 1, while in reality only the low-bit of the register has a well-defined
value.
In
<a href="https://github.com/llvm-mirror/llvm/commit/7b129940425f14653692ae13dc7a33d551413444">https://github.com/llvm-mirror/llvm/commit/7b129940425f14653692ae13dc7a33d551413444</a>
a variant of this issue affecting i1 icmps was fixed. However, the issue is
more general than that and can occur with arbitrary icmps if they come from a
SelectionDAG fallback and happen to be combined in just the right way.
I believe the correct way to handle this is to fastEmitZExtFromI1() the branch
condition (even though this will regress FastISel code quality).</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>