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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [x86] psubus matching failure with undef elements"
href="https://bugs.llvm.org/show_bug.cgi?id=40083">40083</a>
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<th>Summary</th>
<td>[x86] psubus matching failure with undef elements
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<th>Product</th>
<td>new-bugs
</td>
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<th>Version</th>
<td>unspecified
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>new bugs
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>spatel+llvm@rotateright.com
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</tr>
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<th>CC</th>
<td>htmldeveloper@gmail.com, llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>This example came up in the discussion for D55780:
unsigned long long test_sub_2(__m128i x) {
__m128i c = _mm_set1_epi8(70);
return _mm_subs_epu8(x, c)[0];
}
Currently this becomes in IR:
define i64 @test_sub_2(<2 x i64> %x) {
%t0 = bitcast <2 x i64> %x to <16 x i8>
%cmp = icmp ugt <16 x i8> %t0, <i8 70, i8 70, i8 70, i8 70, i8 70, i8 70, i8
70, i8 70, i8 70, i8 70, i8 70, i8 70, i8 70, i8 70, i8 70, i8 70>
%bop = add <16 x i8> %0, <i8 -70, i8 -70, i8 -70, i8 -70, i8 -70, i8 -70, i8
-70, i8 -70, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8
undef, i8 undef>
%sel = select <16 x i1> %cmp, <16 x i8> %bop, <16 x i8> <i8 0, i8 0, i8 0, i8
0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8
undef, i8 undef, i8 undef>
%bc = bitcast <16 x i8> %sel to <2 x i64>
%ext = extractelement <2 x i64> %bc, i32 0
ret i64 %ext
}
And that becomes this in x86 asm:
vpmaxub LCPI0_0(%rip), %xmm0, %xmm1
vpcmpeqb %xmm1, %xmm0, %xmm1
vpaddb LCPI0_1(%rip), %xmm0, %xmm0
vpand %xmm0, %xmm1, %xmm0
vmovq %xmm0, %rax
---------------------------------------------------------------------------
We want this to become psubus again, but undefs are getting in the way.
It's possible that we also want to add an IR transform to turn the
bitcast+extract into an extracting shufflevector+bitcast.</pre>
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</p>
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