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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [DAGCombine] Missed truncate(extract()) -> extract(bitcast()) opportunities"
href="https://bugs.llvm.org/show_bug.cgi?id=39975">39975</a>
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<th>Summary</th>
<td>[DAGCombine] Missed truncate(extract()) -> extract(bitcast()) opportunities
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Common Code Generator Code
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
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<th>CC</th>
<td>andrea.dibiagio@gmail.com, craig.topper@gmail.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
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<p>
<div>
<pre>As mentioned in <a href="https://reviews.llvm.org/D55558">https://reviews.llvm.org/D55558</a>
DAGCombine is very conservative at combining truncate + vector extracts, only
performing it before legalization:
Meaning we miss a change to improve:
define float @cvt(<2 x i64> %a0) nounwind {
%1 = ashr <2 x i64> %a0, <i64 33, i64 33>
%2 = extractelement <2 x i64> %1, i32 0
%3 = sitofp i64 %2 to float
ret float %3
}
llc -mcpu=btver2
cvt: # @cvt
vpsrad $1, %xmm0, %xmm0
vpshufd $245, %xmm0, %xmm0 # xmm0 = xmm0[1,1,3,3]
vmovq %xmm0, %rax
vcvtsi2ssl %eax, %xmm1, %xmm0
retq
cvt2: # @cvt2
vpsrad $1, %xmm0, %xmm0
vpextrd $1, %xmm0, %eax
vcvtsi2ssl %eax, %xmm1, %xmm0
retq
<a href="https://godbolt.org/z/B1Hh0r">https://godbolt.org/z/B1Hh0r</a>
We could just add a more aggressive combine to X86, but an alternative would be
some kind of 'isExtractInsertVectorIndexLegal(VT, int)' check to let the
existing general combine operate later.</pre>
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