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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [Hexagon] Cannot select:v2i16/v4i16 = any_extend"
   href="https://bugs.llvm.org/show_bug.cgi?id=39877">39877</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[Hexagon] Cannot select:v2i16/v4i16 = any_extend
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: Hexagon
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>bcahoon@codeaurora.org, kparzysz@codeaurora.org, llvm-bugs@lists.llvm.org, sgundapa@codeaurora.org, spatel+llvm@rotateright.com
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        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=21193" name="attach_21193" title="ISD::EXTRACT_VECTOR_ELT SimplifyDemandedBits Support">attachment 21193</a> <a href="attachment.cgi?id=21193&action=edit" title="ISD::EXTRACT_VECTOR_ELT SimplifyDemandedBits Support">[details]</a></span>
ISD::EXTRACT_VECTOR_ELT SimplifyDemandedBits Support

The attached WIP patch to add SimplifyDemandedBits support for
ISD::EXTRACT_VECTOR_ELT exposes issues in Hexagon:

Failing Tests (2):
    LLVM :: CodeGen/Hexagon/vect/setcc-v2i32.ll
    LLVM :: CodeGen/Hexagon/vect/zext-v4i1.ll

LLVM ERROR: Cannot select: t41: v4i16 = any_extend t31
  t31: v4i1 = setcc t26, t48, seteq:ch
    t26: v4i16,ch = load<(load 8 from %ir.a0, align 64)> t0, t2, undef:i32
      t2: i32,ch = CopyFromReg t0, Register:i32 %1
        t1: i32 = Register %1
      t4: i32 = undef
    t48: v4i16 = bitcast Constant:i64<0>
      t47: i64 = Constant<0></pre>
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      </p>


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