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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [llvm-mca] LSUnit: Consider using field `LoadLatency` from MCSchedModel to simulate the latency of load instructions."
href="https://bugs.llvm.org/show_bug.cgi?id=39829">39829</a>
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<th>Summary</th>
<td>[llvm-mca] LSUnit: Consider using field `LoadLatency` from MCSchedModel to simulate the latency of load instructions.
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<th>Product</th>
<td>tools
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>llvm-mca
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>andrea.dibiagio@gmail.com
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<th>CC</th>
<td>andrea.dibiagio@gmail.com, llvm-bugs@lists.llvm.org, matthew.davis@sony.com
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<p>
<div>
<pre>Class LSUnit doesn't know about the latency of load instructions. So, it
conservatively/pessimistically assumes that the latency of a load opcode
matches the instruction latency.
In the absence of cache misses (i.e. L1I/L1D/iTLB/dTLB hits/misses),
and load/store conflicts, the latency of a load is determined by the depth
of the load pipeline. So, we could use field `LoadLatency` in the
MCSchedModel to model that latency.
Field `LoadLatency` often matches the so-called 'load-to-use' latency from
L1D, and it usually already accounts for any extra latency due to data
forwarding.
When doing throughput analysis, `LoadLatency` is likely to
be a better predictor of load latency than instruction latency. This is
particularly true when simulating code with temporal/spatial locality of
memory accesses.
Using `LoadLatency` (instead of the instruction latency) is also expected
to improve the load queue allocation for long latency instructions with
folded memory operands.</pre>
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