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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AArch64] add tablegen pattern matching for "long" math instructions"
href="https://bugs.llvm.org/show_bug.cgi?id=39722">39722</a>
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<th>Summary</th>
<td>[AArch64] add tablegen pattern matching for "long" math instructions
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AArch64
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>spatel+llvm@rotateright.com
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<th>CC</th>
<td>arnaud.degrandmaison@arm.com, llvm-bugs@lists.llvm.org, peter.smith@linaro.org, Ties.Stuij@arm.com
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<p>
<div>
<pre>As discussed in <a href="https://reviews.llvm.org/D54392">https://reviews.llvm.org/D54392</a> :
define <4 x i16> @usubl(<8 x i8> %a, <8 x i8> %b) {
%za = zext <8 x i8> %a to <8 x i16>
%zb = zext <8 x i8> %b to <8 x i16>
%xa = shufflevector <8 x i16> %za, <8 x i16> undef, <4 x i32> <i32 0, i32 1,
i32 2, i32 3>
%xb = shufflevector <8 x i16> %zb, <8 x i16> undef, <4 x i32> <i32 0, i32 1,
i32 2, i32 3>
%bo = sub <4 x i16> %xa, %xb
ret <4 x i16> %bo
}
$ llc -o - uxtl.ll -mtriple=aarch64
ushll v0.8h, v0.8b, #0
ushll v1.8h, v1.8b, #0
sub v0.4h, v0.4h, v1.4h
ret
This should be "usubl"? Similar matching should be added for other math ops and
types supported by the ISA.</pre>
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