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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - redundant mask op could be eliminated"
href="https://bugs.llvm.org/show_bug.cgi?id=39578">39578</a>
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<th>Summary</th>
<td>redundant mask op could be eliminated
</td>
</tr>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Scalar Optimizations
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>spatel+llvm@rotateright.com
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</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>Forking this off from <a class="bz_bug_link
bz_status_NEW "
title="NEW - Redundent and instruction caused by switch condition operand shrinking"
href="show_bug.cgi?id=29009">bug 29009</a>:
define void @redundant_mask(i32 %x, i32* %st1, i8* %st2) {
%and1 = and i32 %x, 7
store i32 %and1, i32* %st1
%conv = trunc i32 %x to i8
%and2 = and i8 %conv, 7
store i8 %and2, i8* %st2
ret void
}
We (GVN?) should be able to recognize that the 2nd 'and' can be removed to
reduce the IR:
define void @no_redundant_mask(i32 %x, i32* %st1, i8* %st2) {
%and1 = and i32 %x, 7
store i32 %and1, i32* %st1
%conv2 = trunc i32 %and1 to i8
store i8 %conv2, i8* %st2
ret void
}
%and1 = and i32 %x, 7
store i32 %and1, i32* %p
%conv = trunc i32 %x to i8
%r = and i8 %conv, 7
=>
%and1 = and i32 %x, 7
store i32 %and1, i32* %p
%r = trunc i32 %and1 to i8
<a href="https://rise4fun.com/Alive/JGb">https://rise4fun.com/Alive/JGb</a></pre>
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