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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][MC][GFX9] Incorrect VAddr size for image_sample_b and image_sample_b_o with a16=1"
href="https://bugs.llvm.org/show_bug.cgi?id=39324">39324</a>
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<th>Summary</th>
<td>[AMDGPU][MC][GFX9] Incorrect VAddr size for image_sample_b and image_sample_b_o with a16=1
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpreobrazhensky@luxoft.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>According to AMD doc, image_sample_b has the following address components:
- bias;
- at least one coordinate (1D).
Both components may be packed, so in case of a16=1 all address components fit
into one register:
image_sample_b v5, v1, s[8:15], s[12:15] dmask:0x1 a16
This looks like a valid code. However assembler expects at least 64-bit VAddr:
image_sample_b v5, v[1:2], s[8:15], s[12:15] dmask:0x1 a16
A similar problem exists with image_sample_b_o. These two are the only GFX9
instructions which have issues with VAddr size.</pre>
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