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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][MC][GFX7] Could 16-bit instructions use inline literals?"
href="https://bugs.llvm.org/show_bug.cgi?id=39298">39298</a>
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<th>Summary</th>
<td>[AMDGPU][MC][GFX7] Could 16-bit instructions use inline literals?
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpreobrazhensky@luxoft.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<pre>GFX7 has only a few 16-bit opcodes, for example v_cvt_f32_f16. Could these
opcodes correctly use inline constants or should they be handled as literals?
Current implementation enables inline constants with v_cvt_f32_f16:
v_cvt_f32_f16_e32 v0, -1 ; encoding: [0xc1,0x16,0x00,0x7e]
In our discussion with Artem (dated back to 03 February, 2017) it was decided
to disable 16-bit incline constants for test generator. They are encoded as
32-bit literals. This result in failures for v_cvt_f32_f16 and
v_cvt_f32_f16_e64.
Could anybody clarify if CI HW supports 16-bit inline constants?</pre>
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