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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] SimplifyDemandedBits failure to simplify PMULDQ/PMULUDQ"
   href="https://bugs.llvm.org/show_bug.cgi?id=39178">39178</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[X86] SimplifyDemandedBits failure to simplify PMULDQ/PMULUDQ
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>andrea.dibiagio@gmail.com, craig.topper@gmail.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>define <2 x i64> @muludq_demanded_bits(<4 x i32>, <4 x i32>) {
  %3 = shufflevector <4 x i32> %0, <4 x i32> <i32 undef, i32 0, i32 undef, i32
0>, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
  %4 = shufflevector <4 x i32> %1, <4 x i32> <i32 undef, i32 0, i32 undef, i32
0>, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
  %5 = bitcast <4 x i32> %3 to <2 x i64>
  %6 = bitcast <4 x i32> %4 to <2 x i64>
  %7 = mul <2 x i64> %6, %5
  ret <2 x i64> %7
}

llc -mcpu=btver2

vpxor   %xmm2, %xmm2, %xmm2
vpblendw        $204, %xmm2, %xmm0, %xmm0 # xmm0 =
xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
vpblendw        $204, %xmm2, %xmm1, %xmm1 # xmm1 =
xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
vpmuludq        %xmm0, %xmm1, %xmm0
retq

The vpblendw can be removed as PMULDQ/PMULUDQ only use the bottom 32-bits of
each i64 element</pre>
        </div>
      </p>


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