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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [IndVarSimplify / LoopVectorizer] IV simplification prohibits vectorization"
href="https://bugs.llvm.org/show_bug.cgi?id=38946">38946</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[IndVarSimplify / LoopVectorizer] IV simplification prohibits vectorization
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Scalar Optimizations
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>paulsson@linux.vnet.ibm.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=20881" name="attach_20881" title="reduced testcase">attachment 20881</a> <a href="attachment.cgi?id=20881&action=edit" title="reduced testcase">[details]</a></span>
reduced testcase
Similarly to the test case in <a class="bz_bug_link
bz_status_NEW "
title="NEW - [LoopAccessAnalysis / IndVarSimplify]"
href="show_bug.cgi?id=38935">bug 38935</a>, IndVarSimplify rewrites the IV from
i32 to i64 on SystemZ, and the result is that the LoopVectorizer can no longer
recognize this as a vectorizable loop:
opt tc_indvar_phi.ll -mtriple=i686-unknown-linux-gnu -mcpu=icelake-server -S -o
/dev/null -O3 -debug-only=loop-vectorize
LV: We can vectorize this loop!
opt tc_indvar_phi.ll -mtriple=systemz-unknown -mcpu=z14 -S -o /dev/null -O3
-debug-only=loop-vectorize
LV: Found an unidentified PHI. %.125 = phi i32 [ %.01630, %.lr.ph.preheader ],
[ %.2, %14 ]
LV: Not vectorizing: Cannot prove legality.
.lr.ph.preheader: ; preds = %.preheader
br label %.lr.ph
.lr.ph: ; preds = %.lr.ph.preheader,
%13
%.125 = phi i32 [ %.2, %13 ], [ %.01630, %.lr.ph.preheader ]
%.11824 = phi i32 [ %.3, %13 ], [ %.01729, %.lr.ph.preheader ]
%.12123 = phi i32 [ %14, %13 ], [ %.02028, %.lr.ph.preheader ]
%6 = sext i32 %.12123 to i64
%7 = getelementptr inbounds %0, %0* %0, i64 %6, i32 3
%8 = load i32, i32* %7, align 4, !tbaa !5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %13
; <label>:10: ; preds = %.lr.ph
%11 = icmp slt i32 %.031, %.11824
%spec.select = select i1 %11, i32 %.031, i32 %.11824
%12 = icmp slt i32 %.12123, %.125
%spec.select22 = select i1 %12, i32 %.12123, i32 %.125
br label %13
; <label>:13: ; preds = %10, %.lr.ph
%.3 = phi i32 [ %.11824, %.lr.ph ], [ %spec.select, %10 ]
%.2 = phi i32 [ %.125, %.lr.ph ], [ %spec.select22, %10 ]
%14 = add nsw i32 %.12123, 1
%15 = icmp slt i32 %.12123, -1
br i1 %15, label %.lr.ph, label %._crit_edge.loopexit
....
*** IR Dump After Induction Variable Simplification ***
.lr.ph.preheader: ; preds = %.preheader
%6 = sext i32 %.02028 to i64
br label %.lr.ph
; Loop:
.lr.ph: ; preds = %.lr.ph.preheader,
%15
%indvars.iv = phi i64 [ %6, %.lr.ph.preheader ], [ %indvars.iv.next, %15 ]
%.125 = phi i32 [ %.2, %15 ], [ %.01630, %.lr.ph.preheader ]
%.11824 = phi i32 [ %.3, %15 ], [ %.01729, %.lr.ph.preheader ]
%7 = getelementptr inbounds %0, %0* %0, i64 %indvars.iv, i32 3
%8 = load i32, i32* %7, align 4, !tbaa !5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %15
; <label>:10: ; preds = %.lr.ph
%11 = icmp slt i32 %.031, %.11824
%spec.select = select i1 %11, i32 %.031, i32 %.11824
%12 = sext i32 %.125 to i64
%13 = icmp slt i64 %indvars.iv, %12
%14 = trunc i64 %indvars.iv to i32
%spec.select22 = select i1 %13, i32 %14, i32 %.125
br label %15
; <label>:15: ; preds = %10, %.lr.ph
%.3 = phi i32 [ %.11824, %.lr.ph ], [ %spec.select, %10 ]
%.2 = phi i32 [ %.125, %.lr.ph ], [ %spec.select22, %10 ]
%indvars.iv.next = add nsw i64 %indvars.iv, 1
%16 = icmp slt i64 %indvars.iv, -1
br i1 %16, label %.lr.ph, label %._crit_edge.loopexit
It looks like some analysis can't handle the sext:ed phi.</pre>
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