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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - Rewrite the 'CBR' instruction to an InstAlias in TableGen"
   href="https://bugs.llvm.org/show_bug.cgi?id=38802">38802</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>Rewrite the 'CBR' instruction to an InstAlias in TableGen
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AVR
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>me@dylanmckay.io
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Rewrite the 'CBR' instruction, which is currently implemented as a hardware
instruction, to an instruction alias of 'ANDI Rd, COM(K)'.

This will fix this compilation warning:

===============
[423/492] Building AVRGenDisassemblerTables.inc...
Decoding Conflict:
                0111............
                01..............
                ................
        ANDIRdK 0111____________
        CBRRdK 0111____________
================

This is the only remaining instruction that needs to be converted to an alias.

This particular instruction is complicated because the alias is not so simple -
we need to complement an immediate operand before MCInst lowering.

This is currently done inside a PostEncoder method on a custom immediate
operand type in TableGen.


def imm_com8 : Operand<i8>
{
  let EncoderMethod = "encodeComplement";

  let MIOperandInfo = (ops i8imm);
}

Here is the naive InstAlias implementation

 // CBR Rd, K
 //
 // Mnemonic alias to 'AND Rd, COM(K)'. Same bit pattern, same operands,
 // same everything. K must be complemeted.
 def : InstAlias<"cbr\t$rd, $k",
                 (ANDI LD8:$rd, imm_com8:$k), /* the immediate K must be
complemented. */
                 /* Disable display, so we don't override ORI */ 0>;

It appears that the PostEncoder method of 'imm_com8' is ignored. This is likely
because the InstAlias mapping is done at a high layer, directly substituting
the CBR instruction for the ANDI well before the PostEncoder method is called
or even queried.</pre>
        </div>
      </p>


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