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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - ARM: Incorrect COFF relocation type for thumb bl instruction"
   href="https://bugs.llvm.org/show_bug.cgi?id=38620">38620</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>ARM: Incorrect COFF relocation type for thumb bl instruction
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>6.0
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: ARM
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>jordanrh@microsoft.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>LLVM generates incorrect relocation entry for thumb BL instruction, which
causes the instruction to be overwritten by a BLX instruction at load time.

In lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp :
ARMWinCOFFObjectWriter::getRelocType(),

  case ARM::fixup_t2_condbranch:
    return COFF::IMAGE_REL_ARM_BRANCH20T;
  case ARM::fixup_t2_uncondbranch:
    return COFF::IMAGE_REL_ARM_BRANCH24T;
  case ARM::fixup_arm_thumb_bl:   <--- BLX23T is wrong relocation type for this
instruction
  case ARM::fixup_arm_thumb_blx:
    return COFF::IMAGE_REL_ARM_BLX23T;

fixup_arm_thumb_bl should return COFF::IMAGE_REL_ARM_BRANCH24T.

Here are the descriptions of the relocation types from
<a href="https://docs.microsoft.com/en-us/windows/desktop/debug/pe-format#arm-processors">https://docs.microsoft.com/en-us/windows/desktop/debug/pe-format#arm-processors</a>.

IMAGE_REL_THUMB_BRANCH24
0x0014
The instruction is fixed up with the 25-bit relative displacement to the 2-byte
aligned target. The least significant bit of the displacement is zero and is
not stored.This relocation corresponds to a Thumb-2 B instruction. 

IMAGE_REL_THUMB_BLX23 
0x0015
The instruction is fixed up with the 25-bit relative displacement to the 4-byte
aligned target. The low 2 bits of the displacement are zero and are not stored. 
This relocation corresponds to a Thumb-2 BLX instruction.

This bug manifested when porting the rust compiler to thumbv7a-pc-windows-msvc.</pre>
        </div>
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