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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Alias analysis fails on aliased function arguments -- possibly resulting in incorrect code after scheduling"
href="https://bugs.llvm.org/show_bug.cgi?id=38529">38529</a>
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<th>Summary</th>
<td>Alias analysis fails on aliased function arguments -- possibly resulting in incorrect code after scheduling
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<th>Product</th>
<td>new-bugs
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<th>Version</th>
<td>6.0
</td>
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<th>Hardware</th>
<td>Other
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>release blocker
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>new bugs
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>ruttenberg@reservoir.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=20679" name="attach_20679" title="C program example">attachment 20679</a> <a href="attachment.cgi?id=20679&action=edit" title="C program example">[details]</a></span>
C program example
Attached in an example program (taken from the gcc test suite). Note that the
order fo the stores to pi and pl must happen in order because the argument to f
may alias, and in fact in this example they do. So the machine scheduler will
need a DAG edge from the store to pi to the store to pl.
To see the problem, we need a target that schedules with alias analysis
enabled. Arm64 cortex-53 is one example of this. So compile with:
clang --target=aarch64-arm-none-eabi -mcpu=cortex-a53 -O2 -S store-store.c
-mllvm -debug-only=isel -mllvm -view-misched-dags
I have attached the dot file for the function f that this generates. Note the
lack of an edge from between the STRX and the STRW. I have also attached the
result store-store.s. The code generated is clearly wrong. It performs the
stores in the wrong order and returns 1 instead of 0.</pre>
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