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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [DAGCombine] Call TargetLowering::SimplifyDemandedVectorElts from supported ops"
   href="https://bugs.llvm.org/show_bug.cgi?id=37989">37989</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[DAGCombine] Call TargetLowering::SimplifyDemandedVectorElts from supported ops
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Common Code Generator Code
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>andrea.dibiagio@gmail.com, craig.topper@gmail.com, efriedma@codeaurora.org, filcab@gmail.com, lebedev.ri@gmail.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>As mentioned on [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - Equivalent vector shuffles emit widely different x86 avx2 code"
   href="show_bug.cgi?id=37890">Bug #37890</a>], we currently only use SimplifyDemandedVectorElts
in the DAGCombiner DAGCombiner::visitVECTOR_SHUFFLE.

We should add support/tests for calling from DAGCombiner::vist* for all the
supported vector ops:

ISD::CONCAT_VECTORS
ISD::INSERT_SUBVECTOR (and add ISD::EXTRACT_SUBVECTOR support)
ISD::INSERT_VECTOR_ELT (and call from DAGCombiner::visitEXTRACT_VECTOR_ELT)
ISD::VSELECT

Other possible useful operations to add include the various ISD::*EXTEND ops
and we should support passthrough handling of the same AND/OR/XOR/ADD/SUB/MUL
(+SHL/SRL/SRA?) operations as InstCombiner::SimplifyDemandedVectorElts.

Once those are in place we can start adding any necessary target opcodes
through SimplifyDemandedVectorEltsForTargetNode etc.</pre>
        </div>
      </p>


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