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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [AMDGPU][MC] Invalid SGPR size does not trigger an error"
   href="https://bugs.llvm.org/show_bug.cgi?id=37943">37943</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[AMDGPU][MC] Invalid SGPR size does not trigger an error
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AMDGPU
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>dpreobrazhensky@luxoft.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>The following instruction is incorrect because src0 should be a 64-bit operand:

    v_cmp_eq_f64 s[0:1], s2, v[1:2] // assembled ok

However it is assembled without errors. A correct opcode looks as follows:

    v_cmp_eq_f64 s[0:1], s[2:3], v[1:2]

Both variants are assembled ok and produce the same (valid) code.</pre>
        </div>
      </p>


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