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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Scheduler models should use UnsupportedFeatures to indicate unsupported ISAs"
   href="https://bugs.llvm.org/show_bug.cgi?id=37601">37601</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[X86] Scheduler models should use UnsupportedFeatures to indicate unsupported ISAs
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>andrea.dibiagio@gmail.com, clement.courbet@gmail.com, craig.topper@gmail.com, gchatelet@google.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
          </td>
        </tr>

        <tr>
          <th>Blocks</th>
          <td>32325
          </td>
        </tr></table>
      <p>
        <div>
        <pre>We've mentioned this several times: [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - Implement the SandyBridge/Haswell machine model for x86 SSE4 and AVX."
   href="show_bug.cgi?id=17367">Bug #17367</a>] [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - X86 Scheduling Models are incomplete"
   href="show_bug.cgi?id=26792">Bug #26792</a>], [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Remove Schedule classes from models that don't use them"
   href="show_bug.cgi?id=35608">Bug #35608</a>]

But we still don't make use of this field to indicate unsupported ISAs and
reduce test ranges.

NOTE: We must be careful with some models are they are reused on CPUs that DO
support extra ISAs (Haswell on KnightsLanding/KnightsMill), plus SandyBridge is
used as our current 'modern Generic cpu model' so needs to touch all ISAs.</pre>
        </div>
      </p>

        <div id="referenced">
          <hr style="border: 1px dashed #969696">
          <b>Referenced Bugs:</b>
          <ul>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [META][X86] Improve implementation and use of X86 scheduler models"
   href="https://bugs.llvm.org/show_bug.cgi?id=32325">Bug 32325</a>] [META][X86] Improve implementation and use of X86 scheduler models
              </li>
          </ul>
        </div>
        <br>

      <hr>
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      <ul>
          <li>You are on the CC list for the bug.</li>
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