<html>
    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Review current scheduler classes to minimise need for InstRW overrides"
   href="https://bugs.llvm.org/show_bug.cgi?id=37131">37131</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[X86] Review current scheduler classes to minimise need for InstRW overrides
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>andrea.dibiagio@gmail.com, clement.courbet@gmail.com, craig.topper@gmail.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
          </td>
        </tr>

        <tr>
          <th>Depends on</th>
          <td>32857, 35608, 36726, 36911, 36924, 36930, 36931
          </td>
        </tr>

        <tr>
          <th>Blocks</th>
          <td>32325, 35548
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Many models are making very poor use of the default scheduler classes, with
many using InstrRW, resulting in cases such as:

1 - A default class isn't used at all, and all its instructions use InstrRW -
we should be able to at least move some instructions to the default, or split
the class to match as many instructions as possible across all targets.

2 - An instruction uses InstrRW but in fact matches the default class values
(<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Warn if a scheduling instrs/instregex entry doesn't alter the default schedule"
   href="show_bug.cgi?id=35548">Bug #35548</a>).

3 - Some targets just don't need to use some scheduler classes at all (Bug
#35608).

This patch is to track possible splits to the classes that would help us move
away from unnecessary InstRW usage and make the scheduler models more easily
maintainable.</pre>
        </div>
      </p>

        <div id="referenced">
          <hr style="border: 1px dashed #969696">
          <b>Referenced Bugs:</b>
          <ul>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [META][X86] Improve implementation and use of X86 scheduler models"
   href="https://bugs.llvm.org/show_bug.cgi?id=32325">Bug 32325</a>] [META][X86] Improve implementation and use of X86 scheduler models
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - Add scheduler classes for vector masked load/store operations"
   href="https://bugs.llvm.org/show_bug.cgi?id=32857">Bug 32857</a>] Add scheduler classes for vector masked load/store operations
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Warn if a scheduling instrs/instregex entry doesn't alter the default schedule"
   href="https://bugs.llvm.org/show_bug.cgi?id=35548">Bug 35548</a>] [X86] Warn if a scheduling instrs/instregex entry doesn't alter the default schedule
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Remove Schedule classes from models that don't use them"
   href="https://bugs.llvm.org/show_bug.cgi?id=35608">Bug 35608</a>] [X86] Remove Schedule classes from models that don't use them
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86][SSE] Split gpr/vector WriteMove, WriteLoad, WriteStore scheduler classes"
   href="https://bugs.llvm.org/show_bug.cgi?id=36726">Bug 36726</a>] [X86][SSE] Split gpr/vector WriteMove, WriteLoad, WriteStore scheduler classes
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Add scheduler classes that account for GPR<->XMM transfers"
   href="https://bugs.llvm.org/show_bug.cgi?id=36911">Bug 36911</a>] [X86] Add scheduler classes that account for GPR<->XMM transfers
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Split vector schedule classes by vector width only as necessary"
   href="https://bugs.llvm.org/show_bug.cgi?id=36924">Bug 36924</a>] [X86] Split vector schedule classes by vector width only as necessary
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Split WriteIDiv into 8/16/32/64 implementations"
   href="https://bugs.llvm.org/show_bug.cgi?id=36930">Bug 36930</a>] [X86] Split WriteIDiv into 8/16/32/64 implementations
              </li>
              <li>
                [<a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Split WriteIMul into 8/16/32/64 implementations"
   href="https://bugs.llvm.org/show_bug.cgi?id=36931">Bug 36931</a>] [X86] Split WriteIMul into 8/16/32/64 implementations
              </li>
          </ul>
        </div>
        <br>

      <hr>
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